The present invention relates to a method and apparatus for operating a pulse frequency converter, in particular, a pulse frequency converter having switching transistors or gate turn-off thyristors (GTO's).
A preferred area of use is the feeding of a rotating field machine by means of a pulsed three-phase system. With reference to FIG. 1 of the drawings for background, an asynchronous machine ASM is connected via a pulse inverter to the terminals P, N of a d-c voltage. For the control of the machine, for example, the terminal voltages UR, US, UT of the machine may be measured by a corresponding measuring device MU and processed to a desired value for the terminal voltage UR in a regulating and control unit RZ together with desired values f*, U* for frequency and amplitude of the inverter output voltage.
Depending on the control law intended for the practical case, of course, also other set point and/or actual values may be used. For the control or regulation of the machine, generally a sinusoidal or trapezoidal shape of the phase voltages is advantageous, which is given by the shape of a corresponding control voltage UR*, associated with the phase R, for example, in order to control the switches acting on the common inverter-side terminal R. The control pulses S1, S2 for the switches T1, T2 acting on this terminal are then derived from UR*. The equivalent applies also to the control pulses S3, S4 or S5, S6 for the switches T3, T4 acting on terminal S or respectively the switches T5, T6 acting on terminal T, an antiparallel by-pass diode V1 . . . V6 being connected antiparallel to each switch.
In the following, the invention will be explained only with reference to the drive for the switches T1, T2 acting on the AC-side terminal R. The method employed and the components needed are to be used in the same manner for the drive of the other switches and will not be explained separately in the additional figures.
By alternating drive of the switches T1 and T2 either only the positive terminal voltage or only the negative terminal voltage can be connected through to the terminal R. The voltage URS, therefore, can consist only of bipolar voltage pulses, e.g. with a sinusoidal width modulation. In the machine, these pulses lead, by smoothing, to a phase current corresponding to the (e.g. sinusoidal) shape of the control voltage UR*. For the pulsed drive of the switches, therefore, advantageously a high pulse frequency, e.g. several kilo-Hertz, is present, and advantageously transistors or GTO thyristors are used as fast-switching frequency converter switches.
The control pulses S1, S2 are derived from a pulse-width modulated control voltage UM*, which a pulse-width modulator PM forms by sampling the control voltage UR* with a high-frequency, usually triangular gating voltage.
For ideal switches, whose conducting state ends immediately with the end of the driving control pulse, it would actually be necessary only to amplify the pulses of the pulse-width modulated control voltage UM* in a subsequent pulse evaluation stage PA and then to supply them unchanged to switch T1 and inverted to switch T2.
In reality, however, switch T1 requires, after removal of its control pulses S1, a certain time until its conducting state is ended and hence no current can flow from terminal P via switch T1 any more, and instead the current in phase R is commutated from switch T1 to switch T2 or (if T2 is non-conducting) to the by-pass diode V2. In a "storage time" ST1 characteristic for switch T1, therefore, the conducting state is stored even after removal of the control pulse S1, and the phase voltage UR is connected through from the positive terminal voltage to the negative terminal voltage only then.
During this storage time, switch T2 must not yet be driven, to avoid short-circuit of the d-c voltage. The equivalent applies for the storage time ST2 of switch T2 when the control pulse S2 for switch T2 is removed. With the alternating drive of the switches, these switches, therefore, must be jointly latched or interlocked briefly between two pulse-width modulated control pulses with which they are driven alternately.
This latching is done by an appropriate circuit (not shown specifically) in the pulse evaluation stage PA. Generally a constant latch time is adjusted, which must then be longer than the maximum storage time possible in one of the two switches. Hence the control pulses S1 and S2 are shorter by the latch time VT than the binary states of the pulse-width modulated control voltage UM* from which they are derived. Accordingly, the control pulses describe a pulse-width modulated curve whose amplitude is reduced in accordance with the latch times VT and the number of latches occurring within one UR* period. This reduction can actually be taken into account already in the formation of UR* or MR* and hence in the pulse-width control for the control pulses.
Affecting the actual voltage UR is not the latch width VT, but the difference VT-ST1 upon commutation of the current of T1 or respectively the difference VT-ST2 upon commutation of the current of T2. But the storage times of a semi-conductor switch are subject to wide spreads between units and may vary also dependent on load.
While the different storage times after two latches in each instance, i.e. in an alternating cycle, have little effect, they add up, because of the high switching frequency, within a period of the control voltage UR*, which corresponds to the set value for the smoothed voltage UR, to a deviation of the actual voltage which appears as interfering distortion of the desired waveform.